The "brain" of any personal computer is a microprocessor chip, which performs the functions once associated with dedicated hardware central-processing units. Microprocessors are generally organized into two functional areas: the arithmetic/logic unit (ALU) and the control section. The control section obtains instructions from memory and converts them into electronic signals that effectuate the operations they specify. These operations can involve the ALU or, via a bidirectional system bus, extend to every function and device associated with the computer.
A popular family of microprocessors used in personal computers is manufactured by Intel Corporation, Santa Clara, Calif. The internal architecture of these microprocessors, known generally by the designation "x86," has undergone significant evolution since the line was first introduced. The earliest x86 chips (the 8088, 8088-2, 8086 and 80186, hereafter collectively referred to as "8086" due to their similar attributes) were relatively limited in capability. 8086 microprocessors did not support "multitasking," i.e., the ability of a single computer to run more than one application at a time or to run background operations while other tasks are carried out. Also, the 8086 could only address a single Megabyte (Mbyte) of random-access memory (RAM)--adequate by then-prevailing standards but far too limited to run today's software. The 8086 addressed memory bytes in terms of their "real" or physical addresses in RAM. Specifically, an address was specified by a 32-bit pointer having two components: a 16-bit "segment selector" that specified the starting address of a sequential series of bytes (a "segment") to be retrieved; and an effective address offset specifying the displacement, in bytes, of a particular location within the segment. A 20-bit physical address was derived from these components by interpreting the 16-bit segment-selector value as a 20-bit s value having zeros in the in the four least-significant bits; the 16-bit offset value was then added to this 20-bit segment base to produce a 20-bit value designating the physical address. Each memory segment could contain data, commands, command stacks, interrupts, flags or some combination thereof.
Later x86 versions (the 80386, 80486 and Pentium, hereafter collectively referred to as "enhanced x86") have supported both multitasking and an expanded memory range (up to 4 Gigabytes, or Gbytes), as well as a sophisticated memory-protection scheme. To accommodate enlarged memory and a broader instruction set, enhanced x86 microprocessors do not address physical locations in memory directly. Instead, segment registers specify "virtual" addresses that correspond only indirectly to particular locations in physical memory. A memory-management scheme "maps" virtual addresses to their physical counterparts using one of a series of "descriptor tables," which contain entries that point to locations in physical memory. More specifically, the 13 bits of the virtual (or "logical") address, called the "segment selector," specify a location in a descriptor table that defines a memory segment in terms of its physical location and length in bytes. This arrangement facilitates relocation of segments to different portions of memory by mere alteration of entries in the descriptor tables.
Each descriptor table is an array of 8-byte entries called "descriptors." The segment selector identifies a segment descriptor by specifying a particular descriptor table and a descriptor within that table. The descriptor, in turn, specifies the base or starting location of the segment in physical memory. The use of different descriptor tables serves to isolate simultaneously running programs from one another while allowing them to access common resources in memory. Programs running under an enhanced x86 microprocessor specify either a Global Descriptor Table (GDT), which specifies system-wide procedures and data that are available to all active programs; or a Local Descriptor Table (LDT) corresponding to the particular program being run. Unlike the GDT, LDTs address memory locations that are separately masked for each program.
Because of the popularity of the x86 architecture, a substantial number of programs written for the 8086 were in widespread use when Intel introduced the 80286. In order to permit this body of programs to operate on enhanced x86 architectures, Intel designed these architectures to run in two modes. In "real address" or simply "real" mode, the microprocessor emulates the 8086, treating a memory address as corresponding directly to a physical memory location within the 1-Mbyte limit. In "protected" mode, the microprocessor treats an address as a segment selector, implementing the memory-relocation and masking features that characterize the enhanced x86 architecture. The microprocessor can be switched from real mode to protected mode with a single instruction.
This operational flexibility is important, because real-mode processing can prove necessary even outside the context of older programs. In particular, before the operating system and appropriate device drivers are loaded during system startup, disk input/output operations are typically performed in real mode. Routine memory operations (where protection is unnecessary) are also performed more conveniently in real mode, and even current operating software sometimes requires real-mode operation. Unfortunately, processing in real mode remains hampered by the 1-Mbyte address limit. For example, when the computer is initially powered up, the microprocessor loads the computer's operating system into RAM from mass storage; however, because modern operating systems occupy more than 1 Mbyte of memory, loading one in real mode is problematic and requires special techniques to overcome the address limit. Conventionally, programmers circumvent this limit by setting up a buffer of 64 kilobytes (kbytes) in real-mode addressable memory and transferring the operating system in 64-kbyte fragments using routines provided as part of the computer's firmware. This method is quite slow, however, because the transfer routines switch the microprocessor into protected mode in order to copy the contents of the buffer into high memory, then switch back to real mode to perform the mass-storage retrieval operations that bring another 64-kbyte fragment into the buffer. Thus, the operating mode must be switched twice each time the buffer contents are transferred into high memory--a cumbersome procedure, because mode-switching is very slow relative to other operations.